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Thursday, September 17
 

11:00am PDT

Keynote Kick-Off - CHIPS Alliance TBA

11:05am PDT

Open Design Verification - Tao Liu, Google TBA

11:25am PDT

Enabling Fully Open Source And Continuous Integration-Driven Flows in ASIC and FPGA Development - Michael Gielda, Antmicro TBA

11:45am PDT

The Emergence of the Open-Source AIB Chiplet Ecosystem - David Kehlet, Intel TBA

12:05pm PDT

Chipyard: Design of customized open-source RISC-V SoCs - Borivoje Nikolic, UC Berkeley TBA

12:25pm PDT

SweRV and/or OmniXtend Milestones - Zvonimir Bandic, WDC TBA

12:45pm PDT

Chisel & FIRRTL for next-generation SoC designs - Jack Koenig, SiFive TBA

1:05pm PDT

Open ML Accelerator - Anoop Saha, Mentor TBA

1:25pm PDT

Cloud Based Verification of RISC-V Processors – Dan Ganousis, Metrics TBA

1:35pm PDT

OpenROAD open RTL-to-GDS update - Andrew Kahng, OpenRoad/UCSD, and Mohamed Kassem, Efabless TBA

1:50pm PDT

Open Source FPGA Tooling, Our Journey from Resistance to Adoption - Brian Faith, QuickLogic TBA

2:00pm PDT

Summary Wrap-Up TBA
 
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Thursday, September 17
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